ADSP-21368 SHARC Processor Hardware Reference 5-7
Serial Ports
Figure 5-2 shows a block diagram of a SPORT. Setting the
SPTRAN bit
enables the data buffer path, which, once activated, responds by shifting
data in at the rate of SPORTx_CLK. An application program must use the
correct SPORT data buffers, according to the value of SPTRAN bit. The
SPTRAN bit enables either the transmit data buffers for the transmission of
A and B channel data, or it enables the receive data buffers for the recep-
tion of A and B channel data. Inactive data buffers are not needed.
If the SPORT is configured as a transmitter, the data transmitted is writ-
ten to the TXSPxA/TXSPxB buffer. The data is (optionally) companded in
hardware on the primary A channel (SPORT0, 2, 4, and 6 only), then
automatically transferred to the transmit shift register, because compand-
ing is not supported on the secondary B channels. The data in the shift
register is then shifted out via the SPORT’s SPORTx_DA or SPORTx_DB sig-
nal, synchronous to the SPORTx_CLK clock. If framing signals are used, the
SPORTx_FS signal indicates the start of the serial word transmission. The
SPORTx_DA or SPORTx_DB signal is always driven if the SPORT is enabled
(SPEN_A or SPEN_B = 1 in the SPCTLx control register), unless it is in multi-
channel mode and an inactive time slot occurs.
When the SPORT is configured as a transmitter (SPTRAN = 1), the TXSPxA
and TXSPxB buffers, and the channel transmit shift registers respond to
SPORTx_CLK and SPORTx_FS to transmit data. The receive RXSPxA and
RXSPxB buffers, and the receive shift registers are inactive and do not
respond to SPORTx_CLK and SPORTx_FS signals. Since these registers are
inactive, using the core to read them causes a core hang. Furthermore, a
DMA operation may read these registers erroneously without causing a
core hang.
L
If the SPORTs are configured as transmitters (SPTRAN bit = 1 in
SPCTL), programs should not read from the inactive RXSPxA and
RXSPxB buffers. This causes the core to hang indefinitely since the
receive buffer status is always empty.
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