SPORT Operation Modes
5-12 ADSP-21368 SHARC Processor Hardware Reference
Standard DSP Serial Mode
The standard DSP serial mode lets programs configure SPORTs for use by
a variety of serial devices such as serial data converters and audio
CODECs. In order to connect to these devices, a variety of clocking,
framing, and data formatting options are available.
Packed I
2
S Mode A Channel1 0X103-32
Packed I
2
S Mode B Channel1 0X013-32
Packed I
2
S Mode A and B
Channels
1 0 X 1 1 3-32
Left-justified Sample Pair
Mode
(Tx/Rx on FS Rising Edge)
1 1 0 0 0 8-32
Left-justified sample pair
(Tx/Rx on FS Falling Edge)
1 1 1 0 0 8-32
Multichannel A Channels 0 0 X 1 0 3-32
1
Multichannel B Channels 0 0 X 0 1 3-32
1
Multichannel A and B
Channels
0 0 X 1 1 3-32
1
1 Although SPORTs process word lengths of 3 to 32 bits, transmitting or receiving words smaller
than 7 bits at core clock frequency/4 of the processor may cause incorrect operation when DMA
chaining is enabled. Chaining disables the processor’s internal I/O bus for several cycles while
the new transfer control block (TCB) parameters are being loaded. Receive data may be lost (for
example, overwritten) during this period.
Table 5-1. SPORT Operation Modes (Cont’d)
Operating Modes
Bits
OPMODE LAFS FRFS MCEA MCEB SLENx
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