Analog Devices SHARC ADSP-21368 - Page 335

ADSP-21368 SHARC Processor Hardware Reference 5-55
Serial Ports
II4A Address for DMA Channel 4A 19 1 00840
IM4A Internal Modifier for DMA Channel 4A 16 1 00841
C4A Counter for DMA Channel 4A 16 1 00842
CP4A Chain Pointer for DMA Chaining
Channel 4A
20 1 00843
II4B Address for DMA Channel 4B 19 1 00844
IM4B Internal Modifier for DMA Channel 4B 16 1 00845
C4B Counter for DMA Channel 4B 16 1 00846
CP4B Chain Pointer for DMA Chaining
Channel 4B
20 1 00847
II5A Address for DMA Channel 5A 19 1 00848
IM5A Internal Modifier for DMA Channel 5A 16 1 00849
C5A Counter for DMA Channel 5A 16 1 0084A
CP5A Chain Pointer for DMA Chaining
Channel 5A
20 1 0084B
II5B Address for DMA Channel 5B 19 1 0084C
IM5B Internal Modifier for DMA Channel 5B 16 1 0084D
C5B Counter for DMA Channel 5B 16 1 0084E
CP5B Chain Pointer for DMA Chaining
Channel 5B
20 1 0084F
Reserved 00850–0085F
TX4A Transmitter FIFO Register in SP4A 32 1 00860
RX4A Receiver FIFO Register in SP4A 32 1 00861
TX4B Transmitter FIFO Register in SP4B 32 1 00862
RX4B Receiver FIFO Register in SP4B 32 1 00863
Table 5-7. SPORT4 and SPORT5 Registers (Cont’d)
Register
Name
Function Width No. of
Registers
Memory Map
[17:0]