ADSP-21368 SHARC Processor Hardware Reference 5-57
Serial Ports
Reserved 0481A–0483F
II6A Address for DMA Channel 6A 19 1 04840
IM6A Internal Modifier for DMA Channel
6A
16 1 04841
C6A Counter for DMA Channel 6A 16 1 04842
CP6A Chain Pointer for DMA Chaining
Channel 6A
20 1 04843
II6B Address for DMA Channel 6B 19 1 04844
IM6B Internal Modifier for DMA Channel
6B
16 1 04845
C6B Counter for DMA Channel 6B 16 1 04846
CP6B Chain Pointer for DMA Chaining
Channel 6B
20 1 04847
II7A Address for DMA Channel 7A 19 1 04868
IM7A Internal Modifier for DMA Channel
7A
16 1 04849
C7A Counter for DMA Channel 7A 16 1 0484A
CP7A Chain Pointer for DMA Chaining
Channel 7A
20 1 0484B
II7B Address for DMA Channel 7B 19 1 0484C
IM7B Internal modifier for DMA Channel
7B
16 1 0484D
C7B Counter for DMA Channel 7B 16 1 0484E
CP7B Chain pointer for DMA chaining
Channel 7B
20 1 0484F
Reserved 04850–0485F
TX6A Transmitter FIFO Register in SP4A 32 1 04860
Table 5-8. SPORT6 and SPORT7 Registers (Cont’d)
Register Name Function Width No. of
Registers
Memory Map
[17:0]
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