ADSP-21368 SHARC Processor Hardware Reference 5-65
Serial Ports
When set (= 1), the SPORT is configured to transmit on both channels A
and B. When configured to transmit, the
TXSPxA and TXSPxB buffers are
activated, while the transmit shift registers are controlled by SPORTx_CLK
and SPORTx_FS. The RXSPxA and RXSPxB buffers are inactive. This bit
applies to operating modes.
L
Reading from or writing to inactive buffers cause the core to hang
indefinitely until the SPORT is cleared.
Data buffer error status (sticky, read-only). SPCTLx registers, bits 29 and
26 (DERR_A, DERR_B). These bits indicate whether the serial transmit opera-
tion has underflowed (if set, = 1 and SPTRAN = 1) or a receive operation has
overflowed (if set, = 1 and SPTRAN = 0) in the TXSPxA/RXSPxA and
TXSPxB/RXSPxB data buffers.
This description applies to all operating modes. In multichannel modes,
corresponding bits (TUVF, ROVF) are used for this function.
When the SPORT is configured as a transmitter, these bits provide trans-
mit underflow status. As a transmitter, if FSR = 1, these bits indicate
whether the SPORTx_FS signal (from an internal or external source)
occurred while the DXS buffer was empty. If FSR = 0, ROVF or TUVF is set
whenever the SPORT is required to transmit and the transmit buffer is
empty. The SPORTs transmit data whenever they detect a SPORTx_FS
signal.
Specifically, the operation of the
TUVF bit is:
• 0 = No
SPORTx_FS signal occurred while TXSPxA/B buffer is empty.
• 1 = SPORTx_FS signal occurred while TXSPxA/B buffer is empty.
When the SPORT is configured as a receiver, these bits provide receive
overflow status. As a receiver, it indicates when the channel has received
new data while the RXS_A buffer is full. New data overwrites existing data.
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