Analog Devices SHARC ADSP-21368

Moving Data Between SPORTs and Internal Memory
5-78 ADSP-21368 SHARC Processor Hardware Reference
IMSP1A 0xC49 2 RXSP1A or TXSP1A
CSP1A 0xC4A 2 RXSP1A or TXSP1A
CPSP1A 0xC4B 2 RXSP1A or TXSP1A
IISP1B 0xC4C 3 RXSP1B or TXSP1B
IMSP1B 0xC4D 3 RXSP1B or TXSP1B
CSP1B 0xC4E 3 RXSP1B or TXSP1B
CPSP1B 0xC4F 3 RXSP1B or TXSP1B
Reserved
IISP2A 0x440 4 RXSP2A or TXSP2A
IMSP2A 0x441 4 RXSP2A or TXSP2A
CSP2A 0x442 4 RXSP2A or TXSP2A
CPSP2A 0x443 4 RXSP2A or TXSP2A
IISP2B 0x444 5 RXSP2B or TXSP2B
IMSP2B 0x445 5 RXSP2B or TXSP2B
CSP2B 0x446 5 RXSP2B or TXSP2B
CPSP2B 0x447 5 RXSP2B or TXSP2B
IISP3A 0x448 6 RXSP3A or TXSP3A
IMSP3A 0x449 6 RXSP3A or TXSP3A
CSP3A 0x44A 6 RXSP3A or TXSP3A
CPSP3A 0x44B 6 RXSP3A or TXSP3A
IISP3B 0x44C 7 RXSP3B or TXSP3B
IMSP3B 0x44D 7 RXSP3B or TXSP3B
CSP3B 0x44E 7 RXSP3B or TXSP3B
CPSP3B 0x44F 7 RXSP3B or TXSP3B
Table 5-13. SPORT DMA Parameter Registers Addresses (Cont’d)
Register Address DMA Channel SPORT Buffer