ADSP-21368 SHARC Processor Hardware Reference 9-15
S/PDIF Transmitter/Receiver
Figure 9-7. Data Packing for Right-Justified Format, 20 Bits
Figure 9-8. Data Packing for Right-Justified Format, 18 Bits
Figure 9-9. Data Packing for Right-Justified Format, 16 Bits
Bits 27–8: 20-Bit Audio Data 7654BITS 3–0
Padding (zero)
Block Status
Channel Status
User Data
Validity Bit
Bits 27–10: 18-Bit Audio Data 9876 BITS 5–0
Padding (zero)
Block Status
Channel Status
User Data
Validity Bit
Bits 27–12: 16-Bit Audio Data 11 10 9 8 BITS 7–0
Padding (zero)
Block Status
Channel Status
User Data
Validity Bit