Packing Mode
11-16 ADSP-21368 SHARC Processor Hardware Reference
The
LSR register must be read before reading the UARTxRBR register,
because the latter clears the DR bit. Reading the UARTxRBR register
clears both the address-detect and the data-ready interrupts. In
non-packed mode, when the address-detect interrupt is generated,
it means that the data is ready in the RBR buffer while in packed
mode, this is not the case.