Analog Devices SHARC ADSP-21368 - Page 597

ADSP-21368 SHARC Processor Hardware Reference 14-5
System Design
Figure 14-2. Block Diagram of Data Pin Multiplexing (ADSP-2137x)
FLAGS3 - 0
FLAGS7 - 4
3 - 0
7
- 4
11
- 8
15
- 12
PWM3
- 0
PWM7
- 4
FLAGS11
- 8
PWM11
- 8
FLAGS15
- 12
PWM15
- 12
FLAGS/PWM15 - 0
DATA31
-
0
0
7
15
31
EP_DATA16 - 31
PDAP_DATA15
- 0
FLAGS/PWM15
- 0
MTM_DATA15
- 0
EP_DATA8 - 15
PDAP_DATA/CTRL
FLAGS8
- 15
EP_DATA7 - 0
FLAGS7
- 0
FLAG0
IRQ0
FLAG0
FLAG1
FLAG2
FLAG3
FLAG0 PIN
FLAG1 PIN
FLAG2 PIN
FLAG3 PIN
FLAG1
IRQ1
FLA2
IRQ2
FLAG0
TIMEXP
MS2
MS2
ADDR23
-
0
23
0
FROM EXTERNAL
PORT
NOTE: ONLY 16 DATA LINES (DATA15 - 0)
ARE AVAILABLE ON THE ADSP-21375.