ADSP-21368 SHARC Processor Hardware Reference 3-57
External Port
L
If you are using 32-bit SDRAMs, the SDC on the
ADSP-21367/8/9 and ADSP-2137x processors A0 pin is not con-
nected to the SDRAM’s A0 pin.
Table 3-25. 16-Bit Row and Column Address Mapping (2K Words)
Pin Column Address Row Address Bank Address Pins of SDRAM
A[18] IA[23] BA[1]
A[17] IA[22] BA[0]
A[13]
A[12] A[12]
A[11] IA[9] IA[21] A[11]
SDA10 IA[20] A[10]
A[9] IA[8] IA[19] A[9]
A[8] IA[7] IA[18] A[8]
A[7] IA[6] IA[17] A[7]
A[6] IA[5] IA[16] A[6]
A[5] IA[4] IA[15] A[5]
A[4] IA[3] IA[14] A[4]
A[3] IA[2] IA[13] A[3]
A[2] IA[1] IA[12] A[2]
A[1] IA[0] IA[11] A[1]
A[0] 1/0 IA[10] A[0]
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