ADSP-21368 SHARC Processor Hardware Reference A-75
Register Reference
Figure A-30. IDP_PP_CTL Register
Table A-24. IDP_PP_CTL Register Bit Descriptions
Bit Name Description
0 IDP_P01_PDAPMASK Parallel Data Acquisition Port Mask.
0 = Input data from DAI_01 is masked
1 = Input data from DAI_01 is unmasked
1 IDP_P02_PDAPMASK Parallel Data Acquisition Port Mask.
0 = Input data from DAI_02 is masked
1 = Input data from DAI_02 is unmasked
2 IDP_P03_PDAPMASK Parallel Data Acquisition Port Mask.
0 = Input data from DAI_03 is masked
1 = Input data from DAI_03 is unmasked
3 IDP_P04_PDAPMASK Parallel Data Acquisition Port Mask.
0 = Input data from DAI_04 is masked
1 = Input data from DAI_04 is unmasked
IDP_P12_PDAPMASK
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0000000000000000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
Reserved
IDP_P16_PDAPMASK
IDP_PDAP_EN
IDP_P19_PDAPMASK
IDP_P18_PDAPMASK
IDP_P17_PDAPMASK
IDP_P15_PDAPMASK
IDP_P14_PDAPMASK
IDP_P13_PDAPMASK
IDP_P01_PDAPMASK
IDP_P02_PDAPMASK
IDP_P03_PDAPMASK
IDP_P04_PDAPMASK
IDP_P05_PDAPMASK
IDP_P06_PDAPMASK
IDP_P11_PDAPMASK
IDP_P10_PDAPMASK
IDP_P09_PDAPMASK
IDP_P07_PDAPMASK
IDP_P08_PDAPMASK
IDP_PDAP_RESET
IDP_PDAP_CLKEDGE
IDP_PDAP_PACKINGX
IDP_PORT_SELECT
IDP_P20_PDAPMASK
IDP_PP_CTL (0x24B1)
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