Peripheral Interrupt Priority Control Registers
A-166 ADSP-21368 SHARC Processor Hardware Reference
UART0TxI 0x15 UART 0 transmit interrupt
UART1TxI 0x16 UART 0 transmit interrupt
TWII 0x17 Two wire interface interrupt
PWMI 0x18 PWM interrupt
Reserved 0x19 –
0x1E
Reserved
Logic High 0x1F Software option to set IOP
interrupts
LOWEST
Table A-69. Peripheral Interrupt Controller Routing Table (Cont’d)
Interrupt
Name
Vector
Address
Programmable
Interrupt Control
Register (PICR)
Default
Select
Value
Default Function Priority