Analog Devices SHARC ADSP-21368 User Manual

ADSP-21368 SHARC Processor Hardware Reference A-171
Register Reference
Figure A-83. PMCTL Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
0000000000000000
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0000000000000000
TIMEROFF
PLLBP
Timer Enable/Disable
CLKOUTEN
Reserved
Mux Select For CLKOUT and
RESETOUT
0=Mux output = RESETOUT
1=Mux output = CLKOUT
DIVEN
CRAT0
PLL Clock Ratio Bit 0
PPPDN
Shut Down Clock to External Port
PLLM
PLL Multiplier
SPIOFF
Shut Down Clock to SPIs
SP23POFF
Shut Down Clock to SPORT2–3
SP01OFF
Shut Down Clock to SPORT0–1
SRCOFF
Shut Down Clock to SRC, SPDIF,
SRU, PCG, DAI IDP, PDAP
DTCPOFF
Shut Down Clock to DTCP
SP67OFF
PLL Divider Enable
PLLDx
Divide by 2, 4, 8, or 16
INDIV
Input Divider
PMCTL (0x2000)
Shut Down Clock to SPORT 6,
UART1OFF
Shut Down Clock to UART0
UART0OFF
Shut Down Clock to UART0
PLL Bypass
CRAT1
PLL Clock Ratio Bit 1
SDCKR
SDRAM Clock Ratio (Core
Clock to SDRAM Clock)
000=2, 001=2.5
010=3.0, 011=3.5
100=4.0
101, 110, 111=Reserved
TWIOFF
Shut Down Clock to TWI
SDRAMOFF
Shut Down Clock to
SDRAM Controller
PWMOFF
Shut Down Clock to PWM
SP45POFF
Shut Down Clock to SPORT4–5

Analog Devices SHARC ADSP-21368 Specifications

General

Brand	Analog Devices
Model	SHARC ADSP-21368
Category	Computer Hardware
Language	English