Analog Devices SHARC ADSP-21368 - Page 842

Interrupt Registers
B-12 ADSP-21368 SHARC Processor Hardware Reference
27 P13IMASKP
(EPDMA1IMSKP)
Programmable Interrupt 13 Mask Pointer (External Port
DMA Channel 1 Interrupt Mask Pointer).
When the processor is servicing another interrupt, this bit
indicates if the EPDMA1I is unmasked (if set, = 1) or
masked (if cleared, = 0).
28 P17MSKP
(GPTMR2IMSKP)
Programmable Interrupt Mask Pointer 17 (General-Pur-
pose IOP Timer 2 Interrupt Mask Pointer).
When the processor is servicing another interrupt, this bit
indicates if the GPTMR2I interrupt is unmasked (if set, = 1),
or the GPTMR2I interrupt is masked (if cleared, = 0).
29 P18MSKP
(SPIBIMSKP)
Programmable Interrupt Mask Pointer 8 (SPIBI Interrupt
Mask Pointer). When the processor is servicing another
interrupt, this bit indicates if the SPIBI interrupt is
unmasked (if set, = 1), or the SPIBI interrupt is masked (if
cleared, = 0).
31–30 Reserved
Table B-4. LIRPTL Register Bit Descriptions (Cont’d)
Bit Name Description