Analog Devices SHARC ADSP-21368 User Manual

ADSP-21368 SHARC Processor Hardware Reference B-23
Interrupts
Table B-7. IMASKP Register Bit Descriptions
Bit Name Description
0EMUIEmulator Interrupt. When the processor is servicing another interrupt,
this bit indicates if the EMUI interrupt is unmasked (if set, = 1), or
masked (if cleared, = 0). An EMUI occurs on reset and when an external
device asserts the EMU
pin.
1RSTIReset Interrupt. When the processor is servicing another interrupt, this
bit indicates if the RSTI interrupt is unmasked (if set, = 1), or masked
(if cleared, = 0). An RSTI occurs on reset as an external device asserts
the RESET
pin.
2 IICDI Illegal Input Condition Detected Interrupt. When the processor is ser-
vicing another interrupt, this bit indicates if the IICDI interrupt is
unmasked (if set, = 1), or masked (if cleared, = 0). An IICDI occurs
when a TRUE results from the logical ORing of the illegal I/O proces-
sor register access (IIRA) and unaligned 64-bit memory access bits in
the STKYx registers.
3SOVFIStack Overflow/Full Interrupt. When the processor is servicing another
interrupt, this bit indicates if the SOVFI interrupt is unmasked
(if set, = 1), or masked (if cleared, = 0). A SOVFI occurs when a stack in
the program sequencer overflows or is full.
4TMZHITimer Expired High Priority. When the processor is servicing another
interrupt, this bit indicates if the TMZHI interrupt is unmasked
(if set, = 1), or masked (if cleared, = 0). A TMZHI occurs when the
timer decrements to zero. Note that this event also triggers a TMZLI.
Timer operations are controlled as follows:
• The TCOUNT register contains the timer counter. The timer
decrements the TCOUNT register each clock cycle.
• The TPERIOD value specifies the frequency of timer inter-
rupts. The number of cycles between interrupts is
TPERIOD + 1. The maximum value of TPERIOD is 2
32
– 1.
• The TIMEN bit in the MODE2 register starts and stops the
timer.
Since the timer expired event (TCOUNT decrements to zero) generates
two interrupts, TMZHI and TMZLI, programs should unmask the
timer interrupt with the desired priority and leave the other one
masked.
5Reserved

Analog Devices SHARC ADSP-21368 Specifications

General

Brand	Analog Devices
Model	SHARC ADSP-21368
Category	Computer Hardware
Language	English