ADSP-21368 SHARC Processor Hardware Reference ix
Contents
Making Connections in the SRUs ................................................ 4-15
DAI/SRU1 Connection Groups ............................................. 4-18
Group A Connections—Clock Signals ............................... 4-19
Group B Connections—Data Signals ................................. 4-25
Group C Connections—Frame Sync Signals ...................... 4-31
Group D Connections—Pin Signal Assignments ................ 4-36
Group E Connections—Interrupts and Miscellaneous
Signals ........................................................................... 4-43
Group F—Pin Enable Signals ............................................ 4-47
DPI/SRU2 Connection Groups ............................................. 4-51
Group A Connections—Input Routing Signals .................. 4-52
Group B Connections—Pin Assignment Signals ............... 4-56
Group C Connections—Pin Enable Signals ...................... 4-60
General-Purpose I/O (GPIO) and Flags ....................................... 4-64
DAI GPIO and Flags ............................................................. 4-64
DPI GPIO and Flags ............................................................. 4-65
Miscellaneous Signals .................................................................. 4-65
DAI/DPI Interrupt Controller ..................................................... 4-65
Relationship to the Core ........................................................ 4-65
DAI Interrupts ...................................................................... 4-66
DPI Interrupts ...................................................................... 4-67
High and Low Priority Latches .............................................. 4-69
Rising and Falling Edge Masks ............................................... 4-70
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