Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1270 of 1823
Jul 31, 2019
RX23W Group 36. CAN Module (RSCAN)
36.4.2 Timestamp
The timestamp counter is a 16-bit free-running counter used for recording message receive time. The timestamp
counter value is fetched at the start-of-frame (SOF) timing of a message and is then stored in a receive buffer or a FIFO
buffer together with the message ID and data. PCLK or the CAN bit time clock is selectable as a timestamp counter clock
source from the GCFGL.TSSS bit. The clock obtained by dividing the selected clock source by the GCFGL.TSP[3:0]
value is used as the timestamp counter count source.
When the CAN bit time clock is used as a clock source, the timestamp counter stops when the corresponding channel
transitions to channel reset mode or channel halt mode. When PCLK is used as a clock source, the timestamp function is
not affected by channel mode.
The timestamp counter value is reset to 0000h by setting the GCTRH.TSRST bit to 1.
Figure 36.6 Timestamp Function Block Diagram
TSSS bit
TSSS, TSP[3:0]: Bits in the GCFGL register
PCLK
CAN bit time clock
0
1
Divider
Timestamp counter
(16 bits)
TSP[3:0] bits

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English