Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1298 of 1823
Jul 31, 2019
RX23W Group 36. CAN Module (RSCAN)
36.12 Test Settings
36.12.1 Self-Test Mode Setting Procedure
Self-test mode allows communication test on a channel basis by receiving messages transmitted from the own node.
Figure 36.33 shows the self-test mode setting procedure.
Figure 36.33 Self-Test Mode Setting Procedure
Yes
No
Is the STSL.CHLTSTS flag 1
(in channel halt mode)?
Channel halt mode
Start
End
Set the CTRL.CHMDC[1:0] bit to 10b.
Set the CTRH.CTME bit to 1.
Set the CTMS[1:0] bits to 10b or 11b.
Set the CTRL.CHMDC[1:0] bits to 00b.
Are all STSL.CSLPSTS, CHLTSTS, and
CRSTSTS flags 0?
Perform self-test in channel 0.
Set the CTRL.CHMDC[1:0] to 10b.
Is the STSL.CHLTSTS flag 1
(channel halt mode)?
Set the CTRH.CTME bit to 0.
Set the CTMS[1:0] bits to 00b.
Communication test mode is enabled.
Self-test mode 0 (10b) or 1 (11b).
Channel communication mode
Channel halt mode
Communication test mode is disabled.
Standard test mode
Yes
No
Yes
No

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)