R01UH0823EJ0100 Rev.1.00 Page 1352 of 1823
Jul 31, 2019
RX23W Group 38. Serial Peripheral Interface (RSPIa)
38.2.12 RSPI Next-Access Delay Register (SPND)
SPND sets a non-active period (next-access delay) of the SSLAi signal after termination of a serial transfer when the
SPCMDm.SPNDEN bit is 1. Do not change the SPND register while both the SPCR.MSTR and SPCR.SPE bits are 1.
SPNDL[2:0] Bits (RSPI Next-Access Delay Setting)
The SPNDL[2:0] bits set a next-access delay when the SPCMDm.SPNDEN bit is 1.
When using the RSPI in slave mode, set the SPNDL[2:0] bits to 000b.
Address(es): RSPI0.SPND 0008 838Eh
b7 b6 b5 b4 b3 b2 b1 b0
————— SPNDL[2:0]
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b2 to b0 SPNDL[2:0] RSPI Next-Access Delay Setting
b2 b0
0 0 0: 1 RSPCK + 2 PCLK
0 0 1: 2 RSPCK + 2 PCLK
0 1 0: 3 RSPCK + 2 PCLK
0 1 1: 4 RSPCK + 2 PCLK
1 0 0: 5 RSPCK + 2 PCLK
1 0 1: 6 RSPCK + 2 PCLK
1 1 0: 7 RSPCK + 2 PCLK
1 1 1: 8 RSPCK + 2 PCLK
R/W
b7 to b3 — Reserved These bits are read as 0. The write value should be 0. R/W
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