R01UH0823EJ0100 Rev.1.00 Page 204 of 1823
Jul 31, 2019
RX23W Group 9. Clock Generation Circuit
9.8.4 USB Clock
The USB clock (UCLK) is an operating clock for the USB module. The UCLK frequency is specified by the
SCKCR3.CKSEL[2:0] bits, and the PLLCR.STC[5:0], PLIDIV[1:0] bits, and the UPLLCR.UPLIDIV[1:0] and
USTC[5:0] bits.
A 48-MHz clock must be supplied to the USB module. When the USB module is used, setting must be made so that
UCLK is 48 MHz.
9.8.5 CAN Clock
The CAN clock (CANMCLK) is an operating clock for the CAN module.
CANMCLK is generated by the main clock oscillator.
9.8.6 CAC Clock
The CAC clock (CACCLK) is an operating clock for the CAC module.
The CACCLK clocks include CACMCLK which is generated by the main clock oscillator, CACSCLK which is generated by
the sub-clock oscillator, CACHCLK which is generated by the high-speed on-chip oscillator, CACLCLK which is generated
by the low-speed on-chip oscillator, and CACILCLK which is generated by the IWDT-dedicated on-chip oscillator.
9.8.7 RTC-Dedicated Clock
The RTC-dedicated clock (RTCSCLK) is the operating clock for the RTC.
RTCSCLK is generated by the sub-clock oscillator.
9.8.8 IWDT-Dedicated Clock
The IWDT-dedicated clock (IWDTCLK) is the operating clock for the IWDT.
IWDTCLK is internally generated by the IWDT-dedicated on-chip oscillator.
9.8.9 SSI Clock
The SSI clock (SSISCK) is the operating clock for the SSI.
SSISCK is generated by the main clock oscillator.
9.8.10 Clocks for BLE
The Bluetooth-dedicated clock (BLECLK) and the Bluetooth-dedicated low-speed clock (BLELOCO) are the operating
clocks for the BLE. To control these clocks, use the Bluetooth middleware provided by Renesas.
9.8.11 Low-Power Timer Clock
The low-power timer clock (LPTCLK) is an operating clock for the low-power timer. The LPTCLK clocks include a
clock generated by the sub-clock oscillator and a clock generated by the IWDT-dedicated on-chip oscillator.
To Next Page
Loading...
Need help?
General
