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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 242 of 1823
Jul 31, 2019
RX23W Group 11. Low Power Consumption
11.6.1.2 Exit from Sleep Mode
Exit from sleep mode is initiated by any interrupt, a RES# pin reset, a power-on reset, a voltage monitoring reset, or a
reset caused by an IWDT underflow.
ï‚· Initiated by an interrupt
An interrupt initiates exit from sleep mode and the interrupt exception handling starts. If a maskable interrupt has
been masked by the CPU (the priority level
*
1
of the interrupt has been set to a value lower than that of the
PSW.IPL[3:0] bits
*
2
of the CPU), sleep mode is not exited.
ï‚· Initiated by a RES# pin reset
When the RES# pin is driven low, the MCU enters the reset state. When the RES# pin is driven high after the reset
signal is input for a predetermined time period, the CPU starts the reset exception handling.
ï‚· Initiated by a power-on reset
A power-on reset asserts a reset to the MCU.
When a power-on reset is negated by a rise in the supply voltage, the CPU starts the reset exception handling.
ï‚· Initiated by a voltage monitoring reset
A voltage monitoring reset asserts a reset to the MCU.
When a voltage monitoring reset is negated by a rise in the supply voltage, the CPU starts the reset exception
handling.
ï‚· Initiated by an independent watchdog timer reset
An internal reset generated by an IWDT underflow asserts a reset to the MCU. However, when IWDT counting is
stopped in sleep mode by setting OFS0.IWDTSTRT = 0 and OFS0.IWDTSLCSTP = 1, or OFS0.IWDTSTRT = 1
and IWDTCSTPR.SLCSTP = 1, the IWDT is stopped in sleep mode and sleep mode is not exited by the
independent watchdog timer reset.
Note 1. For details, refer to section 15, Interrupt Controller (ICUb).
Note 2. For details, refer to section 2, CPU.
11.6.1.3 Sleep Mode Return Clock Source Switching Function
To switch the clock source used for exit from sleep mode, set the sleep mode return clock source switching register
(RSTCKCR) and the wait control register for each clock. When the return interrupt is generated, after oscillation settling
of the oscillator specified as the return clock, the clock source is automatically switched, and then operation exits sleep
mode. At this time, the registers related to clock source switching are automatically rewritten.
For details, refer to
section 11.2.8, Sleep Mode Return Clock Source Switching Register (RSTCKCR).
For details on settings the oscillation stabilization wait time, refer to
section 9.2.16, Main Clock Oscillator Wait
Control Register (MOSCWTCR)
.

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Renesas RX Series Specifications

General IconGeneral
BrandRenesas
ModelRX Series
CategoryMicrocontrollers
LanguageEnglish

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