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R01UH0823EJ0100 Rev.1.00 Page 1470 of 1823

Jul 31, 2019

RX23W Group 40. SD Host Interface (SDHIa)

40.4.1 DMA Transfer Triggered by Interrupt Requests

When the SBFAI interrupt is requested, DMA/DTC transfer can be used to write to or read the SDBUFR register. When

using the SBFAI interrupt, set the SDDMAEN.DMAEN bit to 1, the SDIMSK2.BWEM bit to 1, and SDIMSK2.BREM

bit to 1.

When the SDDMAEN.DMAEN bit is 1, if a write command is issued, the SDSTS2.BWE flag becomes 1; if a read

command is issued, the SDSTS2.BRE flag becomes 1. At this point, the SBFAI interrupt request is output. When the last

data of a block is transferred (one block is the transfer data size set in the SDSIZE.LEN[9:0] bits), the SBFAI interrupt

request is cleared, and the SDSTS2.BWE flag or the SDSTS2.BRE flag becomes 0.

The SBFAI interrupt request is also cleared by following:

 The SDRST.SDRST bit is set to 0 (SDHI software reset).

 The SDSTOP.STP bit is set to 1.

 The SDIOMD.IOABT bit is set to 1.

 The SDDMAEN.DMAEN bit is set to 0.

However, if the DMAEN bit is set to 1 again before the next command is written to the SDCMD register, the SBFAI

interrupt request is output again.

The SBFAI interrupt request will not be cleared when a communication error or timeout occurs during DMA transfer.

Perform error processing by software.

The SDSTS2.BWE flag and BRE flag will not become 0 when a communication error or timeout occurs, nor will they

become 0 when the SDSTOP.STP bit and SDIOMD.IOABT bit are set to 1. If the SDSTS2.BWE flag or BRE flag

remain set to 1, even if a write command or read command is issued, the SBFAI interrupt request will not be output, and

the SDSTS2.BWE flag and BRE flag must be set to 0 before issuing the next command.

Table 40.9 lists the DMAC and DTC settings when performing DMA transfer.

Table 40.9 DMAC and DTC Settings When Performing DMA Transfer

Item Setting Description

Transfer mode Block transfer mode

Transfer data

1 data 32 bits

Block size Size set in the SDSIZE.LEN[9:0] bits divided by 4

Number of block transfers Number of transfers set in the SDBLKCNT register

Renesas RX Series User Manual

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