Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 268 of 1823
Jul 31, 2019
RX23W Group 15. Interrupt Controller (ICUb)
15. Interrupt Controller (ICUb)
15.1 Overview
The interrupt controller receives interrupt requests from peripheral modules and external pins, and generates an interrupt
request to the CPU and a transfer request to the DTC and DMAC.
Table 15.1 lists the specifications of the interrupt controller, and Figure 15.1 shows a block diagram of the interrupt
controller.
Note 1. For the DTC and DMAC triggers, refer to Table 15.3, Interrupt Vector Table.
Table 15.1 Specifications of Interrupt Controller
Item Description
Interrupts Peripheral function
interrupts
 Interrupts from peripheral modules
 Interrupt detection: Edge detection/level detection
Edge detection or level detection is fixed for each source of connected peripheral modules.
External pin
interrupts
 Interrupts from pins IRQ0, IRQ1, and IRQ4 to IRQ7
 Number of sources: 6
 Interrupt detection: Low level/falling edge/rising edge/rising and falling edges
One of these detection methods can be set for each source.
 Digital filter function: Supported
Software interrupt
 Interrupt generated by writing to a register
 One interrupt source
Event link interrupt The ELSR8I, ELSR18I or ELSR19I interrupt is generated by an ELC event
Interrupt priority Specified by registers.
Fast interrupt
function
Faster interrupt processing of the CPU can be set only for a single interrupt source.
DTC/DMAC control Interrupt sources can be used to start the DTC and DMAC.*
1
Non-
maskable
interrupts
NMI pin interrupt  Interrupt from the NMI pin
 Interrupt detection: Falling edge/rising edge
 Digital filter function: Supported
Oscillation stop
detection interrupt
Interrupt on detection of oscillation having stopped
WDT underflow/
refresh error
Interrupt on an underflow of the down counter or occurrence of a refresh error
IWDT underflow/
refresh error
Interrupt on an underflow of the down counter or occurrence of a refresh error
Voltage monitoring
1 interrupt
Voltage monitoring interrupt of voltage monitoring circuit 1 (LVD1)
VBATT voltage
monitoring interrupt
Voltage monitoring interrupt of the VBATT
Return from power-down modes
 Sleep mode, deep sleep mode:
Return is initiated by non-maskable interrupts or any other interrupt source.
 Software standby mode:
Return is initiated by non-maskable interrupts, IRQ0, IRQ1, and IRQ4 to IRQ7 interrupts, or RTC
alarm/periodic interrupts.

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)