Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1322 of 1823
Jul 31, 2019
RX23W Group 37. Serial Sound Interface (SSI)
37.3.3 WS Continue Mode
In WS continue mode, the SSIWS0 signal continues to be toggled irrespective whether data transmission is enabled or
disabled. This mode can be set using the SSITDMR.CONT bit. With this mode enabled, the SSIWS0 signal does not stop
but continues toggling even if the SSICR.TEN and REN bits are both set to 0 (transmission disabled). With this mode
disabled, the SSIWS0 signal stops if the SSICR.TEN and REN bits are both set to 0.
Figure 37.15 and Figure 37.16 show the operations with WS continue mode enabled and disabled, respectively.
Figure 37.15 WS Continue Mode Enabled
Figure 37.16 WS Continue Mode Disabled
MSB MSBMSBLSB LSB LSB
Data transfer disabled period (SSICR.TEN bit = 0, SSICR.REN bit = 0)
SSISCK
SSIWS
SSIDATA
MSB MSBMSBLSB LSB LSB
Data transfer disabled period (SSICR.TEN bit = 0, SSICR.REN bit = 0)
SSISCK
SSIWS
SSIDATA

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English