Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 714 of 1823
Jul 31, 2019
RX23W Group 25. 16-Bit Timer Pulse Unit (TPUa)
25.8.2 Interrupt Signal Timing
(1) Timing of Interrupt Signal Setting on Compare Match
Figure 25.39 shows the timing for setting the interrupt signal by compare match occurrence.
Figure 25.39 TGImy Interrupt Timing (Compare Match)
(2) Timing of Interrupt Signal Setting on Input Capture
Figure 25.40 shows the timing for setting the interrupt signal by input capture occurrence.
Figure 25.40 TGImy Interrupt Timing (Input Capture)
TCNT input clock
TGRy
TCNT
Interrupt signal
PCLK
Compare match signal
N
NN + 1
N
Input capture signal
TGRy
TCNT
PCLK
N
Interrupt signal
n

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)