Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 156 of 1823
Jul 31, 2019
RX23W Group 8. Voltage Detection Circuit (LVDAb)
8. Voltage Detection Circuit (LVDAb)
The voltage detection circuit (LVD) monitors the voltage level input to the VCC pin using a program.
8.1 Overview
In voltage detection 0, the detection voltage can be selected from three levels using option function select register 1
(OFS1).
In voltage detection 1, the detection voltage can be selected from 10 levels using the voltage detection level select
register (LVDLVLR).
Voltage monitoring 0 reset and voltage monitoring 1 reset/interrupt can be used.
Table 8.1 lists the specifications of the voltage detection circuit. Figure 8.1 is a block diagram of the voltage detection
circuit.
Figure 8.2 is a block diagram of the voltage monitoring 1 interrupt/reset circuit.
Table 8.1 LVD Specifications
Item Voltage Monitoring 0 Voltage Monitoring 1
VCC monitoring Monitored voltage Vdet0 Vdet1
Detection target Voltage drops past Vdet0 When voltage rises above or drops below Vdet1
Detection voltage Voltage selectable from four levels using
OFS1
Voltage selectable from 10 levels using the
LVDLVLR.LVD1LVL[3:0] bits
Monitoring flag Not available LVD1SR.LVD1MON flag: Monitors whether
voltage is higher or lower than Vdet1
LVD1SR.LVD1DET flag: Vdet1 passage detection
Process upon
voltage detection
Reset Voltage monitoring 0 reset Voltage monitoring 1 reset
Reset when Vdet0 > VCC
CPU restart after specified
time with VCC > Vdet0
Reset when Vdet1 > VCC
CPU restart timing selectable: after specified time
with VCC > Vdet1 or Vdet1 > VCC
Interrupt Not available Voltage monitoring 1 interrupt
Non-maskable or maskable interrupt is selectable
Interrupt request issued when Vdet1 > VCC and
VCC > Vdet1 or either
Event link function Not available Available
Vdet1 passage detection event output

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English