Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 821 of 1823
Jul 31, 2019
RX23W Group 30. Watchdog Timer (WDTA)
30.2 Register Descriptions
30.2.1 WDT Refresh Register (WDTRR)
WDTRR refreshes the down-counter of the WDT.
The down-counter of the WDT is refreshed by writing 00h and then writing FFh to WDTRR (refresh operation) within
the refresh-permitted period.
After the down-counter has been refreshed, it starts counting down from the value selected by setting the
WDTTOPS[1:0] bits in option function select register 0 (OFS0) in auto-start mode. In register start mode, counting down
starts from the value selected by setting the WDTCR.TOPS[1:0] bits.
When 00h is written, the read value is 00h, when a value other than 00h is written, the read value is FFh.
For details of the refresh operation, refer to
section 30.3.3, Refresh Operation.
Address(es): 0008 8020h
b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
11111111
Bit Description R/W
b7 to b0 The down-counter is refreshed by writing 00h and then writing FFh to this register R/W

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)