Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 324 of 1823
Jul 31, 2019
RX23W Group 17. Memory-Protection Unit (MPU)
17.2.4 Background Access Control Register (MPBAC)
UBAC[2:0] Bit
s (
Background Access Control Bits in User Mode
)
These bits specify the background access control in user mode.
Address(es): 0008 6504h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16
————————————————
Value after reset:
0000000000000000
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
———————————— UBAC[2:0] —
Value after reset:
0000000000000000
Bit Symbol Bit Name Function R/W
b0 — Reserved The read value is 0. The write value should always be 0. R/W
b3 to b1 UBAC[2:0] Background Access Control Bits in
User Mode
b3
0: Reading prohibited
1: Reading permitted
b2
0: Writing prohibited
1: Writing permitted
b1
0: Execution prohibited
1: Execution permitted
R/W
b31 to b4 — Reserved The read value is 0. The write value should always be 0. R/W

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)