Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 709 of 1823
Jul 31, 2019
RX23W Group 25. 16-Bit Timer Pulse Unit (TPUa)
(1) Input Capture/Compare Match Interrupt
An interrupt is requested when the TGIEy bit (y = A, B, C, D) in TPUm.TIER is set to 1 by the occurrence of a
TPUm.TGRy input capture/compare match on a channel. The TPU has 16 input capture/compare match interrupts, four
each for TPU0 and TPU3, and two each for TPU1, TPU2, TPU4, and TPU5.
(2) Overflow Interrupt
An interrupt is requested when the TCIEV bit in TPUm.TIER is set to 1 by the occurrence of a TPUm.TCNT overflow
on a channel. The TPU has six overflow interrupts, one for each channel.
(3) Underflow Interrupt
An interrupt is requested when the TCIEU bit in TPUm.TIER is set to 1 by the occurrence of a TPUm.TCNT underflow
on a channel. The TPU has four underflow interrupts, one each for TPU1, TPU2, TPU4, and TPU5.
25.5 DTC Activation
The DTC can be activated by the TPUm.TGRy input capture/compare match interrupt of each channel. For details, see
section 19, Data Transfer Controller (DTCa).
A total of 16 input capture/compare match interrupts can be used as DTC activation sources, four each for TPU0 and
TPU3, and two each for TPU1, TPU2, TPU4, and TPU5.
25.6 DMAC Activation
The DMAC can be activated by the TPUm.TGRA input capture/compare match interrupt of each channel. For details,
see
section 18, DMA Controller (DMACA).
A total of six TPUm.TGRA input capture/compare match interrupts can be used as DMAC activation sources, one for
each channel.
25.7 A/D Converter Activation
The TPU can activate the A/D converter by the TPUm.TGRA input capture/compare match for each channel.
When the TTGE bit in TPUm.TIER is set to 1, the TPU requests the A/D converter to start A/D conversion by the
occurrence of a TPUm.TGRA input capture/compare match on a particular channel.

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English