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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 1139 of 1823
Jul 31, 2019
RX23W Group 35. I
2
C-bus Interface (RIICa)
35.2.11 Slave Address Register Ly (SARLy) (y = 0 to 2)
SVA0 Bit (10-Bit Address LSB)
When the 10-bit address format is selected (SARUy.FS bit is 1), this bit functions as the LSB of a 10-bit address and
forms the lower 8 bits of a 10-bit address in combination with the SVA[6:0] bits.
When the ICSER.SARyE bit is set to 1 (SARLy and SARUy enabled) and the SARUy.FS bit is 1, this bit is valid. While
the SARUy.FS bit or SARyE bit is 0, the setting of this bit is ignored.
SVA[6:0] Bits (7-Bit Address/10-Bit Address Lower Bits)
When the 7-bit address format is selected (SARUy.FS bit is 0), these bits function as a 7-bit address. When the 10-bit
address format is selected (SARUy.FS bit is 1), these bits function as the lower 8 bits of a 10-bit address in combination
with the SVA0 bit.
While the ICSER.SARyE bit is 0, the setting of these bits is ignored.
Address(es): RIIC0.SARL0 0008 830Ah, RIIC0.SARL1 0008 830Ch, RIIC0.SARL2 0008 830Eh
b7 b6 b5 b4 b3 b2 b1 b0
SVA[6:0] SVA0
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b0 SVA0 10-Bit Address LSB A slave address is set. R/W
b7 to b1 SVA[6:0] 7-Bit Address/10-Bit Address Lower Bits A slave address is set. R/W

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Renesas RX Series Specifications

General IconGeneral
CoreRXv1, RXv2, RXv3
Flash MemoryUp to 8 MB
RAMUp to 1 MB
Operating Voltage1.62V to 5.5V
Operating Temperature-40°C to +85°C or +105°C
PackageBGA, LQFP
ADC Resolution12-bit
DAC Resolution12-bit
Communication InterfacesSCI, SPI, I2C, USB, Ethernet, CAN
Architecture32-bit
Security FeaturesMemory Protection Unit (MPU)

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