EasyManuals Logo

Renesas RX Series User Manual

Renesas RX Series
1823 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1424 background imageLoading...
Page #1424 background image
R01UH0823EJ0100 Rev.1.00 Page 1424 of 1823
Jul 31, 2019
RX23W Group 40. SD Host Interface (SDHIa)
the busy state, the SDSTS1.ACEND flag becomes 1.
Performing a multi-block transfer
When the STP bit is set to 1, the SDHI issues CMD12, and the command sequence is stopped. The SD buffer can be
accessed even after the STP bit is set to 1, but a buffer access error occurs and the SDSTS2.ILW flag or
SDSTS2.ILR flag becomes 1. If the command sequence stops due to a communication error or a timeout, the SDHI
does not issue CMD12.
Performing a single block transfer
When the STP bit is set to 1 during a single block write access, if there is no data in the SD buffer, the
SDSTS1.ACEND flag becomes 1. If there is data in the SD buffer, after the SDHI is released from the busy state,
the SDSTS1.ACEND flag becomes 1. When the STP bit is set to 1 during a single block read access, the
SDSTS1.ACEND flag becomes 1. Also, CMD12 is not issued even if the STP bit is set to 1 during a single block
read access or single block write access.
SDBLKCNTEN Bit (Block Count Register Value Select)
If the SDBLKCNTEN bit is 1 during a multi-block transfer sequence, the SDHI automatically issues CMD12. When the
SDCMD.RSPTP[2:0] bits are set to 000b and CMD18 or CMD25 is issued, or if the SDCMD.RSPTP[2:0] bits are set to
011b, 100b, 101b, 110b, or 111b and the SDCMD.TRSTP bit is 1 (multiple blocks transferred), if the
SDCMD.CMD12AT[1:0] bits are 00b (CMD12 is automatically issued during multi-block transfer), and the number of
transfer blocks reaches the value set in the SDBLKCNT register, the SDHI automatically issues CMD12.
If the command sequence is stopped by a communication error or a timeout, CMD12 is not automatically issued.
40.2.4 Block Count Register (SDBLKCNT)
When performing a multi-block transfer, SDBLKCNT is a readable/writable register used to set the number of blocks to
be transferred. For example, when the register value is 0000 0001h, 1 block is transferred; when the register value is
0000 FFFFh, 65,535 blocks are transferred; and when the register value is FFFF FFFFh, 4,294,967,295 blocks are
transferred. Do not set this register to 0000 0000h. Do not rewrite the SDBLKCNT register when the SDSTS2.CBSY
flag is 1.
SDBLKCNT
Address(es): SDHI.SDBLKCNT 0008 AC14h
b31 b30 b29 b28 b27 b26 b25 b24 b23 b22 b21 b20 b19 b18 b17 b16 b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
00000000000000000000000000000000

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Renesas RX Series and is the answer not in the manual?

Renesas RX Series Specifications

General IconGeneral
CoreRXv1, RXv2, RXv3
Flash MemoryUp to 8 MB
RAMUp to 1 MB
Operating Voltage1.62V to 5.5V
Operating Temperature-40°C to +85°C or +105°C
PackageBGA, LQFP
ADC Resolution12-bit
DAC Resolution12-bit
Communication InterfacesSCI, SPI, I2C, USB, Ethernet, CAN
Architecture32-bit
Security FeaturesMemory Protection Unit (MPU)

Related product manuals