Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 511 of 1823
Jul 31, 2019
RX23W Group 23. Multi-Function Timer Pulse Unit 2 (MTU2a)
23.2.23 Timer Cycle Data Registers (TCDR)
Note: The TCDR registers must not be accessed in 8-bit units; they should be accessed in 16-bit units.
The TCDR registers specify the count value to switch the count direction of the TCNTS counter. These registers are used
only in complementary PWM mode. Set half the PWM cycle as the TCDR register value. The TCDR register is
constantly compared with the TCNTS counter in complementary PWM mode, and when a match occurs, the TCNTS
counter switches direction (down-count to up-count).
23.2.24 Timer Cycle Buffer Registers (TCBR)
Note: The TCBR registers must not be accessed in 8-bit units; they should be accessed in 16-bit units.
The TCBR registers function as buffer registers for the TCDR register, and specify the count value to switch the count
direction of the TCNTS counter. These registers are used only in complementary PWM mode. The TCBR register value
is transferred to the TCDR register with the transfer timing set in the TMDR register.
Address(es): MTU.TCDR 000D 0A14h
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
1111111111111111
Address(es): MTU.TCBR 000D 0A22h
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
1111111111111111

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)