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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 1672 of 1823
Jul 31, 2019
RX23W Group 50. Flash Memory (FLASH)
Writing to the extra area is started by writing 1 to the OPST bit. Do not write to the CMD[2:0] bits while a software
command is being executed.
50.4.11 Flash Processing Start Address Register H (FSARH)
The FSARH register is used to set the target processing address or the start address of the target processing range in the
flash memory when a software command is executed.
Set bit 31 to bit 25 and bit 20 to bit 16 of the flash memory address for programming/erasure in this register.
Data can be written to this register in ROM P/E mode or E2 DataFlash P/E mode.
This register is initialized by a reset or setting the FRESETR.FRESET bit to 1. Data cannot be written to this register
while the FRESETR.FRESET bit is 1.
If this register is read while executing a software command set by the FEXCR register, an undefined value is read.
Refer to
Figure 50.1 and Figure 50.2 for details on the addresses of the flash memory.
50.4.12 Flash Processing Start Address Register L (FSARL)
The FSARL register is used to set the target processing address or the start address of the target processing range in the
flash memory when a software command is executed.
Set bit 15 to bit 0 of the flash memory address for programming/erasure in this register.
When the target is the ROM, set bit 2 to bit 0 to 000b.
Data can be written to this register in ROM P/E mode or E2 DataFlash P/E mode.
This register is initialized by a reset or setting the FRESETR.FRESET bit to 1. Data cannot be written to this register
while the FRESETR.FRESET bit is 1.
This register is incremented by 8h if the ROM is specified and 1h if the E2 DataFlash is specified after a program
command is executed. Therefore, it is not necessary to set the target address to be written to this register when executing
a program command sequentially.
If this register is read while executing a software command set by the FEXCR register, an undefined value is read.
Refer to
Figure 50.1 and Figure 50.2 for details on the addresses of the flash memory.
Address(es): FLASH.FSARH 007F C110h
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
————
Value after reset:
0000000000000000
Address(es): FLASH.FSARL 007F C108h
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
0000000000000000

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Renesas RX Series Specifications

General IconGeneral
CoreRXv1, RXv2, RXv3
Flash MemoryUp to 8 MB
RAMUp to 1 MB
Operating Voltage1.62V to 5.5V
Operating Temperature-40°C to +85°C or +105°C
PackageBGA, LQFP
ADC Resolution12-bit
DAC Resolution12-bit
Communication InterfacesSCI, SPI, I2C, USB, Ethernet, CAN
Architecture32-bit
Security FeaturesMemory Protection Unit (MPU)

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