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R01UH0823EJ0100 Rev.1.00 Page 1556 of 1823

Jul 31, 2019

RX23W Group 44. 12-Bit A/D Converter (S12ADE)

44.2.15 A/D Disconnection Detection Control Register (ADDISCR)

ADDISCR sets the disconnection detection assist function.

ADNDIS[4:0] Bits (A/D Disconnection Detection Assist Setting)

These bits select either precharge or discharge and the period of precharge/discharge for the A/D disconnection detection

assist function. Setting the ADNDIS[4] bit = 1 allows to select precharge and setting the ADNDIS[4] bit = 0 allows to

select discharge. The period of precharge/discharge can be set with the ADNDIS[3:0] bits. When the ADNDIS[3:0] bits

= 0000b, the disconnection detection assist function is not effective. Setting of the ADNDIS[3:0] bits to 0001b is

prohibited. Except for the case of ADNDIS[3:0] = 0000b or 0001b, the specified value indicates the number of states for

the period of precharge/discharge.

When the ADEXICR.OCSA or TSSA bit is set to 1 to perform A/D conversion of the temperature sensor output or

internal reference voltage, ADNDIS[4:0] are automatically fixed to 0Fh, and discharging is executed prior to A/D

conversion (auto-discharging). An auto-discharge period of 15 ADCLK cycles is inserted before sampling each time the

temperature sensor output or internal reference voltage is A/D-converted.

Address(es): S12AD.ADDISCR 0008 907Ah

b7 b6 b5 b4 b3 b2 b1 b0

— — — ADNDIS[4:0]

Value after reset:

00000000

Bit Symbol Bit Name Description R/W

b4 to b0 ADNDIS[4:0] A/D Disconnection

Detection Assist Setting

b4 ADNDIS[4]: Discharge/precharge selected

0: Discharge

1: Precharge

b3 to b0 ADNDIS[3:0]: Discharge/precharge period

R/W

b7 to b5 — Reserved These bits are read as 0. The write value should be 0. R/W

Renesas RX Series User Manual

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