R01UH0823EJ0100 Rev.1.00 Page 1005 of 1823
Jul 31, 2019
RX23W Group 33. Serial Communications Interface (SCIg, SCIh)
33.2.18 I
2
C Status Register (SISR)
Note 1. Only 0 can be written to this bit, to clear the flag.
SISR is used to monitor state in relation to simple I
2
C mode.
IICACKR Flag (ACK Reception Data Flag)
Received ACK and NACK bits can be read from this bit.
The IICACKR flag is updated at the rising of SSCLn clock for the ACK/NACK receiving bit.
Address(es): SCI1.SISR 0008 A02Ch, SCI5.SISR 0008 A0ACh, SCI8.SISR 0008 A10Ch, SCI12.SISR 0008 B30Ch
b7 b6 b5 b4 b3 b2 b1 b0
———————
IICACK
R
Value after reset:
00xx0x00
x: Undefined
Bit Symbol Bit Name Description R/W
b0 IICACKR ACK Reception Data Flag 0: ACK received
1: NACK received
R/W*
1
b1 — Reserved This bit is read as 0. The write value should be 0. R/W
b2 — Reserved The read value is undefined. R
b3 — Reserved This bit is read as 0. The write value should be 0. R/W
b5, b4 — Reserved The read value is undefined. R
b7, b6 — Reserved These bits are read as 0. The write value should be 0. R/W
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