Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 585 of 1823
Jul 31, 2019
RX23W Group 23. Multi-Function Timer Pulse Unit 2 (MTU2a)
23.4 Interrupt Sources
23.4.1 Interrupt Sources and Priorities
There are three interrupt sources; the TGR input capture/compare match, the TCNT counter overflow, and the TCNT
counter underflow. Each interrupt source has its own enable/disable bit, allowing the generation of interrupt request
signals to be enabled or disabled individually.
When an interrupt source is detected, an interrupt is requested if the corresponding enable/disable bit in the TIER register
is set to 1.
Relative channel priorities can be changed by the interrupt controller; however the priority within a channel is fixed. For
details, refer to
section 15, Interrupt Controller (ICUb).
Table 23.54 lists the MTU interrupt sources.
Table 23.54 MTU Interrupt Sources (1)
Note: This table lists the initial state immediately after a reset. The relative channel priorities can be changed by the interrupt
controller.
Channel Name Interrupt Source
DMAC
Activation
DTC
Activation Priority
MTU0 TGIA0 MTU0.TGRA input capture/compare match Possible Possible High
TGIB0 MTU0.TGRB input capture/compare match Not possible Possible
TGIC0 MTU0.TGRC input capture/compare match Not possible Possible
TGID0 MTU0.TGRD input capture/compare match Not possible Possible
TCIV0 MTU0.TCNT overflow Not possible Not possible
TGIE0 MTU0.TGRE compare match Not possible Not possible
TGIF0 MTU0.TGRF compare match Not possible Not possible
MTU1 TGIA1 MTU1.TGRA input capture/compare match Possible Possible
TGIB1 MTU1.TGRB input capture/compare match Not possible Possible
TCIV1 MTU1.TCNT overflow Not possible Not possible
TCIU1 MTU1.TCNT underflow Not possible Not possible
MTU2 TGIA2 MTU2.TGRA input capture/compare match Possible Possible
TGIB2 MTU2.TGRB input capture/compare match Not possible Possible
TCIV2 MTU2.TCNT overflow Not possible Not possible
TCIU2 MTU2.TCNT underflow Not possible Not possible
MTU3 TGIA3 MTU3.TGRA input capture/compare match Possible Possible
TGIB3 MTU3.TGRB input capture/compare match Not possible Possible
TGIC3 MTU3.TGRC input capture/compare match Not possible Possible
TGID3 MTU3.TGRD input capture/compare match Not possible Possible
TCIV3 MTU3.TCNT overflow Not possible Not possible
MTU4 TGIA4 MTU4.TGRA input capture/compare match Possible Possible
TGIB4 MTU4.TGRB input capture/compare match Not possible Possible
TGIC4 MTU4.TGRC input capture/compare match Not possible Possible
TGID4 MTU4.TGRD input capture/compare match Not possible Possible
TCIV4 MTU4.TCNT overflow/underflow Not possible Possible Low

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)