R01UH0823EJ0100 Rev.1.00 Page 275 of 1823
Jul 31, 2019
RX23W Group 15. Interrupt Controller (ICUb)
15.2.6 DTC Transfer Request Enable Register n (DTCERn)
(n = interrupt vector number)
An interrupt source that has been selected as a DMAC trigger should not be specified as a DTC trigger. See Table 15.3,
Interrupt Vector Table
, for the interrupt sources that are selectable as the DTC trigger.
DTCE Bit (DTC Transfer Request Enable)
When the DTCE bit is set to 1, the corresponding interrupt source is selected as the DTC trigger.
[Setting condition]
When 1 is written to the DTCE bit
[Clearing conditions]
When the specified number of transfers is completed (for the chain transfer, the number of transfers for the last
chain transfer is completed)
When 0 is written to the DTCE bit
Address(es): ICU.DTCER027 0008 711Bh to ICU.DTCER255 0008 71FFh
b7 b6 b5 b4 b3 b2 b1 b0
———————DTCE
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b0 DTCE DTC Transfer Request
Enable
0: The corresponding interrupt source is not selected as the DTC
trigger.
1: The corresponding interrupt source is selected as the DTC trigger.
R/W
b7 to b1 — Reserved These bits are read as 0. The write value should be 0. R/W
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