Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 176 of 1823
Jul 31, 2019
RX23W Group 9. Clock Generation Circuit
9.2.4 PLL Control Register 2 (PLLCR2)
Note: Set the PRCR.PRC0 bit to 1 (write enabled) before rewriting this register.
PLLEN Bit (PLL Stop Control)
This bit runs or stops the PLL circuit.
After setting the PLLEN bit to 0 (PLL is operating), confirm that the OSCOVFSR.PLOVF bit is 1 before switching the
system clock to the PLL clock.
That is, a fixed time for stabilization is required after the setting for PLL operation. A fixed time is also required for
oscillation to stop after the setting to stop PLL operation. Accordingly, take note of the following limitations when
starting and stopping PLL operation.
 After stopping the PLL, confirm that the OSCOVFSR.PLOVF bit is 0 before restarting the PLL.
 Confirm that the PLL is operating and that the OSCOVFSR.PLOVF bit is 1 before stopping the PLL.
 Regardless of whether or not it is selected as the system clock, confirm that the OSCOVFSR.PLOVF bit is 1 before
executing a WAIT instruction to place the MCU in software standby mode.
 After stopping the PLL, confirm that the OSCOVFSR.PLOVF bit is 0 and execute a WAIT instruction before
entering software standby mode.
When the PLL clock is selected by the SCKCR3.CKSEL[2:0] bits, do not set the PLLEN bit (PLL is stopped) to 1.
When the external voltage (VCC) is below 2.4 V or low-speed operating mode is selected by the SOPCCR.SOPCM bit,
do not set the PLLEN bit to 0 (PLL is operating).
Address(es): 0008 002Ah
b7 b6 b5 b4 b3 b2 b1 b0
———————PLLEN
Value after reset:
00000001
Bit Symbol Bit Name Description R/W
b0 PLLEN PLL Stop Control 0: PLL is operating.
1: PLL is stopped.
R/W
b7 to b1 — Reserved These bits are read as 0. The write value should be 0. R/W

Renesas RX Series Specifications

General

Brand	Renesas
Model	RX Series
Category	Microcontrollers
Language	English