R01UH0823EJ0100 Rev.1.00 Page 738 of 1823
Jul 31, 2019
RX23W Group 26. 8-Bit Timer (TMR)
26.2.7 Timer Counter Start Register (TCSTR)
TCS Bit (Timer Counter Status)
The TCS bit is used to check the state of the timer count in response to ELC.
When this bit is read as 1, it shows the timer start state in response to ELC. When this bit is read as 0, it shows the timer
stopped state in response to ELC.
This bit is cleared by writing 0. Do not write 1 to this bit.
The TCS bit is valid only when the count start operation is selected by the ELOPD register of the event controller (ELC).
For details, refer to
section 26.7, Link Operation by ELC, or section 20, Event Link Controller (ELC).
Address(es): TMR0.TCSTR 0008 820Ch, TMR2.TCSTR 0008 821Ch
b7 b6 b5 b4 b3 b2 b1 b0
———————TCS
Value after reset:
xxxxxxx0
x: Undefined
Bit Symbol Bit Name Description R/W
b0 TCS Timer Counter Status 0: Count stopped state in response to ELC.
1: Count start state in response to ELC.
R/W
b7 to b1 — Reserved These bits are read as an undefined value. The write value
should be 0.
R/W
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