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R01UH0823EJ0100 Rev.1.00 Page 355 of 1823

Jul 31, 2019

RX23W Group 18. DMA Controller (DMACA)

18.2.12 DMA Activation Source Flag Control Register (DMCSL)

DISEL Bit (Interrupt Select)

This bit selects whether the interrupt flag of the activation source of the DMAC is cleared to 0 or issues an interrupt to

the CPU, at the beginning of transfer.

When DMTMD.DCTG[1:0] = 00b (activation by software), the setting of the DISEL bit does not affect the operation.

Address(es): DMAC0.DMCSL 0008 201Fh, DMAC1.DMCSL 0008 205Fh, DMAC2.DMCSL 0008 209Fh, DMAC3.DMCSL 0008 20DFh

b7 b6 b5 b4 b3 b2 b1 b0

———————DISEL

Value after reset:

00000000

Bit Symbol Bit Name Description R/W

b0 DISEL Interrupt Select 0: At the beginning of transfer, clear the interrupt flag of the

activation source to 0.

1: At the end of transfer, the interrupt flag of the activation source

issues an interrupt to the CPU.

R/W

b7 to b1 — Reserved These bits are read as 0. The write value should be 0. R/W

Renesas RX Series User Manual

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