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Renesas RX Series User Manual

Renesas RX Series
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R01UH0823EJ0100 Rev.1.00 Page 1664 of 1823
Jul 31, 2019
RX23W Group 50. Flash Memory (FLASH)
50.4.3 Protection Unlock Register (FPR)
This write-only register is used to protect the FPMCR register from being rewritten inadvertently when the CPU runs out
of control. Writing to the FPMCR register is enabled only when the following procedure is used to access the register.
Procedure to unlock protection
(1) Write A5h to the FPR register.
(2) Write a set value to the FPMCR register.
(3) Write the inverted set value to the FPMCR register.
(4) Write a set value to the FPMCR register again.
When a procedure other than the above is used to write data, the FPSR.PERR flag is set to 1.
50.4.4 Protection Unlock Status Register (FPSR)
PERR Flag (Protect Error Flag)
When the FPMCR register is not accessed as described in the procedure to unlock protection, data is not written to the
register and this flag is set to 1.
[Setting condition]
The FPMCR register is not accessed as described in the procedure to unlock protection.
[Clearing condition]
The FPMCR register is accessed according to the procedure to unlock protection described in
section 50.4.3,
Protection Unlock Register (FPR)
.
Address(es): FLASH.FPR 007F C180h
b7 b6 b5 b4 b3 b2 b1 b0
Value after reset:
xxxxxxxx
x: Undefined
Address(es): FLASH.FPSR 007F C184h
b7 b6 b5 b4 b3 b2 b1 b0
———————PERR
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b0 PERR Protect Error Flag 0: No error
1: An error occurs.
R
b7 to b1 Reserved These bits are read as 0. R

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Renesas RX Series Specifications

General IconGeneral
CoreRXv1, RXv2, RXv3
Flash MemoryUp to 8 MB
RAMUp to 1 MB
Operating Voltage1.62V to 5.5V
Operating Temperature-40°C to +85°C or +105°C
PackageBGA, LQFP
ADC Resolution12-bit
DAC Resolution12-bit
Communication InterfacesSCI, SPI, I2C, USB, Ethernet, CAN
Architecture32-bit
Security FeaturesMemory Protection Unit (MPU)

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