Renesas RX Series

R01UH0823EJ0100 Rev.1.00 Page 1259 of 1823
Jul 31, 2019
RX23W Group 36. CAN Module (RSCAN)
36.2.78 Global RAM Window Control Register (GRWCR)
RPAGE Bit (RAM Window Select)
This bit is used to select a window for the switching of registers that are allocated to addresses from 000A 83A0h to
000A 8681h.
[Registers allocated when the RPAGE bit is set to 0 (window 0 selected)]
 Receive rule entry registers: GAFLIDLj, GAFLIDHj, GAFLMLj, GAFLMHj, GAFLPLj, GAFLPHj (j = 0 to 15)
 RAM test registers: RPGACCr (r = 0 to 127)
[Registers allocated when the RPAGE bit is set to 1 (window 1 selected)]
 Receive buffer registers: RMIDLn, RMIDHn, RMTSn, RMPTRn, RMDF0n to RMDF3n (n = 0 to 15)
 Receive FIFO access registers: RFIDLm, RFIDHm, RFTSm, RFPTRm, RFDF0m to RFDF3m (m = 0, 1)
 Transmit/receive FIFO access registers: CFIDL0, CFIDH0, CFTS0, CFPTR0, CFDF00 to CFDF30
 Transmit buffer registers: TMIDLp, TMIDHp, TMPTRp, TMDF0p to TMDF3p (p = 0 to 3)
 Transmit history buffer access register: THLACC0
Address(es): RSCAN.GRWCR 000A 838Ah
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
———————————————RPAGE
Value after reset:
0000000000000000
Bit Symbol Bit Name Description R/W
b0 RPAGE RAM Window Select 0: Selects window 0 (receive rule entry registers, RAM test
registers)
1: Selects window 1 (receive buffer, receive FIFO buffer,
transmit/receive FIFO buffer, transmit buffer, transmit
history data access register)
R/W
b15 to b1 — Reserved The write value should be 0. R/W