Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1500 of 1823
Jul 31, 2019
RX23W Group 43. Capacitive Touch Sensing Unit (CTSU)
43.2.8 CTSU Channel Enable Control Register 4 (CTSUCHAC4)
Note 1. TS32, TS33, and TS34 pins are not available.
The CTSUCHAC4 register should be set when the CTSUCR0.CTSUSTRT bit is 0.
CTSUCHAC4j Bit (CTSU Channel Enable Control 4j) (j = 0 to 3)
This bit sets the pin (for receive and transmit) whose electrostatic capacitance is to be measured.
CTSUCHAC40 bit corresponds to TS32 pin and CTSUCHAC43 bit corresponds to TS35 pin.
Note: TS32, TS33, and TS34 pins are not available.
Address(es): CTSU.CTSUCHAC4 000A 090Ah
b7 b6 b5 b4 b3 b2 b1 b0
————
CTSUC
HAC43
CTSUC
HAC42
CTSUC
HAC41
CTSUC
HAC40
Value after reset:
00000000
Bit Symbol Bit Name Description R/W
b0 CTSUCHAC40 CTSU Channel Enable Control 40 0: Not measurement target
1: Measurement target
These bits specify the TS32 to TS35 pins*
1
.
R/W
b1 CTSUCHAC41 CTSU Channel Enable Control 41 R/W
b2 CTSUCHAC42 CTSU Channel Enable Control 42 R/W
b3 CTSUCHAC43 CTSU Channel Enable Control 43 R/W
b7 to b4 — Reserved These bits are read as 0. The write value should be 0. R/W

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)