R01UH0823EJ0100 Rev.1.00 Page 1112 of 1823
Jul 31, 2019
RX23W Group 34. IrDA Interface
34.4 Usage Notes
34.4.1 Module Stop Function Setting
The IrDA can be enabled and disabled using module stop control register C (MSTPCRC). The IrDA is stopped after a
reset. Registers can be accessed by releasing the module stop state. For details, refer to
section 11, Low Power
Consumption
.
34.4.2 SCI5 Setting
When using the IrDA, set the SCI5.SEMR.ABCS bit to 0 and SMR.STOP bit to 1 (2 stop bits).
34.4.3 Minimum Pulse-Width during Reception
For the input signals (IRRXD5) of this IrDA, input waveforms compliant to IrDA standard 1.0 (minimum pulse width:
1.4 us).
34.4.4 Notes on IrDA Initial Setting/Resetting
To change the value of the SCI5.SCR.TE or RE bit, set the IRCR.IRE bit to 1 (IrDA operates) and the IRCR.IRCKS[2:0]
bits to 000b and then use the following procedure.
(1) Enabling transmission
After the SCI.SCR.TE bit is set to 1 (transmission is enabled), wait for a duration of 18/(16 × SCI5 bit rate) and then
switch the I/O port function to the IRTXD5 pin.
(2) Enabling reception
After the I/O port function is switched to the IRTXD5 pin, wait for a duration of 18/(16 × SCI5 bit rate) and then set
the SCI.SCR.TE bit to 1 (transmission is enabled).
When performing transmission and reception, a duration of 18/(16 × SCI5 bit rate) can be waited at the same time.
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