Renesas RX Series

Features ................................................................................................................................................... 51
1. Overview ........................................................................................................................................ 52
1.1 Outline of Specifications ..................................................................................................................... 52
1.2 List of Products .................................................................................................................................... 57
1.3 Block Diagram ..................................................................................................................................... 58
1.4 Pin Functions ....................................................................................................................................... 59
1.5 Pin Assignments .................................................................................................................................. 63
2. CPU ............................................................................................................................................... 69
2.1 Features ................................................................................................................................................ 69
2.2 Register Set of the CPU ....................................................................................................................... 70
2.2.1 General-Purpose Registers (R0 to R15) ..................................................................................... 71
2.2.2 Control Registers ........................................................................................................................ 71
2.2.2.1 Interrupt Stack Pointer (ISP)/User Stack Pointer (USP) ................................................... 72
2.2.2.2 Exception Table Register (EXTB) .................................................................................... 72
2.2.2.3 Interrupt Table Register (INTB) ........................................................................................72
2.2.2.4 Program Counter (PC) ....................................................................................................... 72
2.2.2.5 Processor Status Word (PSW) ........................................................................................... 73
2.2.2.6 Backup PC (BPC) .............................................................................................................. 74
2.2.2.7 Backup PSW (BPSW) ....................................................................................................... 75
2.2.2.8 Fast Interrupt Vector Register (FINTV) ............................................................................ 75
2.2.2.9 Floating-Point Status Word (FPSW) ................................................................................. 76
2.2.3 Accumulator ............................................................................................................................... 78
2.3 Processor Mode ................................................................................................................................... 79
2.3.1 Supervisor Mode ......................................................................................................................... 79
2.3.2 User Mode .................................................................................................................................. 79
2.3.3 Privileged Instruction ................................................................................................................. 79
2.3.4 Switching Between Processor Modes ......................................................................................... 79
2.4 Data Types ........................................................................................................................................... 80
2.4.1 Integer ......................................................................................................................................... 80
2.4.2 Floating-Points ............................................................................................................................ 81
2.4.3 Bitwise Operations ..................................................................................................................... 81
2.4.4 Strings ......................................................................................................................................... 82
2.5 Endian .................................................................................................................................................. 83
2.5.1 Switching the Endian .................................................................................................................. 83
2.5.2 Access to I/O Registers ..................................
................................................................
............. 86
2.5.3 Notes on Access to I/O Registers ............................................................................................... 86
2.5.4 Data Arrangement ....................................................................................................................... 87
2.5.4.1 Data Arrangement in Registers ......................................................................................... 87
2.5.4.2 Data Arrangement in Memory ........................................................................................... 87
2.5.5 Notes on the Allocation of Instruction Codes ............................................................................ 87
2.6 Vector Table ........................................................................................................................................ 88
Contents