Renesas RX Series

2.6.1 Exception Vector Table .............................................................................................................. 88
2.6.2 Interrupt Vector Table ................................................................................................................ 89
2.7 Operation of Instructions ..................................................................................................................... 90
2.7.1 Restrictions on RMPA and String-Manipulation Instructions ................................................... 90
2.7.1.1 Transfer Size and Data Prefetching ................................................................................... 90
2.7.1.2 Access to the External Space ............................................................................................. 90
2.7.1.3 Access to I/O Registers ..................................................................................................... 90
2.8 Number of Cycles ................................................................................................................................ 91
2.8.1 Instruction and Number of Cycle ............................................................................................... 91
2.8.2 Numbers of Cycles for Response to Interrupts ........................................................................... 95
3. Operating Modes ........................................................................................................................... 96
3.1 Operating Mode Types and Selection ................................................................................................. 96
3.2 Register Descriptions ........................................................................................................................... 97
3.2.1 Mode Monitor Register (MDMONR) ........................................................................................ 97
3.2.2 System Control Register 1 (SYSCR1) ........................................................................................ 98
3.3 Details of Operating Modes ................................................................................................................. 99
3.3.1 Single-Chip Mode ....................................................................................................................... 99
3.3.2 Boot Mode .................................................................................................................................. 99
3.3.2.1 Boot Mode (USB Interface) ..............................................................................................99
3.3.2.2 Boot Mode (SCI) ............................................................................................................... 99
3.4 Transitions of Operating Modes ........................................................................................................ 100
3.4.1 Operating Mode Transitions Determined by the Mode-Setting Pins ....................................... 100
4. Address Space ............................................................................................................................. 101
4.1 Address Space .................................................................................................................................... 101
5. I/O Registers ................................................................................................................................ 103
5.1 I/O Register Addresses (Address Order) ........................................................................................... 105
6. Resets .......................................................................................................................................... 136
6.1 Overview ........................................................................................................................................... 136
6.2 Register Descriptions ......................................................................................................................... 138
6.2.1 Reset Status Register 0 (RSTSR0) ........................................................................................... 138
6.2.2 Reset Status Register 1 (RSTSR1) ...........................................................................................
139
6.2.3 Reset Status Register 2 (RSTSR2) ........................................................................................... 140
6.2.4 Software Reset Register (SWRR) ............................................................................................. 141
6.3 Operation ........................................................................................................................................... 142
6.3.1 RES# Pin Reset ......................................................................................................................... 142
6.3.2 Power-On Reset and Voltage Monitoring 0 Reset ................................................................... 142
6.3.3 Voltage Monitoring 1 Reset ..................................................................................................... 144
6.3.4 Independent Watchdog Timer Reset ........................................................................................ 145
6.3.5 Watchdog Timer Reset ............................................................................................................. 145
6.3.6 Software Reset .......................................................................................................................... 145
6.3.7 Determination of Cold/Warm Start .......................................................................................... 146