Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 1465 of 1823
Jul 31, 2019
RX23W Group 40. SD Host Interface (SDHIa)
40.3.6.9 IO_RW_EXTENDED (CMD53 Multi-Block Write)
Figure 40.18 shows an example of issuing the IO_RW_EXTENDED command (CMD53/Multi-block write).
Figure 40.18 Issuing the IO_RW_EXTENDED Command (CMD53/Multi-Block Write)
Clear the flag register
Set the SDCLKCR register.
SDSIZE = 0000 0200h
SDIMSK1 = 0000 FFFEh
SDIMSK2 = 0000 7F80h
SDSTOP = 0000 0100h
SDBLKCNT = Number of transfer blocks
SDIOMD = 0000 0001h
SDIOIMSK = 0000 BFFEh
Did a response end
or error occur?
SDSTS1 = 0000 FFFEh Clear the flags.
SDARG = Argument field value
SDCMD = 0000 6C35h
CMD53 (multi-block write) issued
Error (communication error or timeout)
Read the SDRSP10 register Check the response.
SDIMSK1 = 0000 FFFBh
SDIMSK2 = 0000 7D80h
Enable the access end interrupt
Enable the BWE interrupt
Is the BWE flag 1 or
did an error occur?
SDSTS2 = 0000 FDFFh Clear the flags.
Write data to the SDBUFR register
(transfer data size set in the SDSIZE register)
Write data.
Did an access end
or error occur?
SDSTS1 = 0000 FFFBh
Clear the flags.
Error processing
(clear the interrupt flags)
A
Have the number
of blocks set in the SDBLKCNT register
been written?
No
Yes
B
From C52PUB
From IOABT
No
Yes
No
Yes
No
Yes
Start
End
Error (communication error or timeout)
Error (communication
error or timeout)

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)