Renesas RX Series User Manual

R01UH0823EJ0100 Rev.1.00 Page 724 of 1823
Jul 31, 2019
RX23W Group 25. 16-Bit Timer Pulse Unit (TPUa)
25.9.16 Continuous Output of Input-Capture Pulse Interrupt Signal
When input-capture signal is set on both edges and when the pulse width of the input-capture input equals to one PCLK
cycle detected by internal sampling, input capture is generated continuously on the rising and falling edges. Therefore, an
input-capture pulse interrupt signal is output continuously to form a flat signal level.
When a pulse interrupt signal is used, the interrupt controller cannot detect the second and subsequent interrupts.
Figure 25.54 shows an operation timing when the input-capture pulse interrupt signal is output continuously.
Figure 25.54 Continuous Output of Input-Capture Pulse Interrupt Signal
PCLK
Input-capture input
Input-capture signal
Input-capture pulse
interrupt signal
Input capture on rising edge
Input capture on falling edge

Renesas RX Series Specifications

General

Core	RXv1, RXv2, RXv3
Flash Memory	Up to 8 MB
RAM	Up to 1 MB
Operating Voltage	1.62V to 5.5V
Operating Temperature	-40°C to +85°C or +105°C
Package	BGA, LQFP
ADC Resolution	12-bit
DAC Resolution	12-bit
Communication Interfaces	SCI, SPI, I2C, USB, Ethernet, CAN
Architecture	32-bit
Security Features	Memory Protection Unit (MPU)