Renesas RX Series - Low-Power Timer (LPT); Overview

R01UH0823EJ0100 Rev.1.00 Page 807 of 1823
Jul 31, 2019
RX23W Group 29. Low-Power Timer (LPT)
29. Low-Power Timer (LPT)
29.1 Overview
This MCU integrates a low-power timer (LPT) that consists of a single-channel 16-bit timer. The LPT uses a sub-clock
or IWDT-dedicated clock as the clock source, and can continue counting operation even in software standby mode. A
compare match signal can be used to return from software standby mode to normal operating mode.
Table 29.1 lists the specifications of the LPT and Figure 29.1 shows a block diagram of the LPT.
Figure 29.1 LPT Block Diagram
Table 29.1 LPT Specifications
Item Description
Clock source Sub-clock or IWDT-dedicated clock
Clock division ratio Divided by 2, 4, 8, 16, or 32
Counting operation
 Count up using the 16-bit up-counter
 Counting operation can be continued even in software standby mode
Compare match Compare match 0 (a compare match signal is generated only in software standby mode)
Event link function (output) An event signal is output when compare match 0 occurs (a compare match signal is generated only in
software standby mode).
interrupt signal for
returning from software
standby mode
Internal peripheral bus
Bus interface
L
P
T
C
R
2
L
P
T
C
R
1
L
P
T
C
R
3
L
P
T
P
R
D
L
P
C
M
R
0
L
P
W
U
C
R
Low-power timer (LPT)
Counter clock
generator
Counter control circuit
Divider
Low-power
timer counter
IWDT-dedicated
on-chip oscillator
32.768 kHz
Sub-clock
oscillator
15 kHz
Comparator
Compare
Match 0
ELC ICU
LPTCR1: Low-power timer control register 1
LPTCR2: Low-power timer control register 2
LPTCR3: Low-power timer control register 3
LPTPRD: Low-power timer period setting register
LPCMR0: Low-power timer compare register 0
LPWUCR: Low-power timer standby wakeup enable register