R01UH0823EJ0100 Rev.1.00 Page 368 of 1823
Jul 31, 2019
RX23W Group 18. DMA Controller (DMACA)
18.3.5 Operation Timing
Figure 18.10 and Figure 18.11 show DMAC operation timing examples.
Figure 18.10 DMAC Operation Timing Example (1) (DMA Activation by Interrupt from Peripheral Module/
External Interrupt Input Pin, Normal Transfer Mode, Repeat Transfer Mode)
Figure 18.11 DMAC Operation Timing Example (2) (DMA Activation by Interrupt from Peripheral Module/
External Interrupt Input Pin, Block Transfer Mode, Block Size = 4)
System clock
DMAC access
Data transfer
R W
IRn in the ICU
DMAC activation
request
System clock
DMAC access
Data transfer
IRn in the ICU
DMAC activation
request